CSAIL Technical Reports (July 1, 2003 - present): Recent submissions
Now showing items 67-69 of 776
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Filtered Iterators For Safe and Robust Programs in RIFL
(2015-12-27)We present a new language construct, filtered iterators, for safe and robust input processing. Filtered iterators are designed to eliminate many common input-processing errors while enabling robust continued execution. The ... -
Jenga: Harnessing Heterogeneous Memories through Reconfigurable Cache Hierarchies
(2015-12-19)Conventional memory systems are organized as a rigid hierarchy, with multiple levels of progressively larger and slower memories. Hierarchy allows a simple, fixed design to benefit a wide range of applications, because ... -
Bridging Theory and Practice in Cache Replacement
(2015-12-19)Much prior work has studied processor cache replacement policies, but a large gap remains between theory and practice. The optimal policy (MIN) requires unobtainable knowledge of the future, and prior theoretically-grounded ...


