| dc.contributor.author | Zhong, Yuhong | |
| dc.contributor.author | Berger, Daniel | |
| dc.contributor.author | Zardoshti, Pantea | |
| dc.contributor.author | Saurez, Enrique | |
| dc.contributor.author | Nelson, Jacob | |
| dc.contributor.author | Psistakis, Antonis | |
| dc.contributor.author | Fried, Joshua | |
| dc.contributor.author | Cidon, Asaf | |
| dc.date.accessioned | 2025-12-18T16:52:18Z | |
| dc.date.available | 2025-12-18T16:52:18Z | |
| dc.date.issued | 2025-06-06 | |
| dc.identifier.isbn | 979-8-4007-1475-7 | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/164402 | |
| dc.description | HOTOS 25, May 14–16, 2025, Banff, AB, Canada | en_US |
| dc.description.abstract | Pooling PCIe devices across multiple hosts offers a promising solution to mitigate stranded I/O resources, enhance device utilization, address device failures, and reduce total cost of ownership. The only viable option today are PCIe switches, which decouple PCIe devices from hosts by connecting them through a hardware switch. However, the high cost and limited flexibility of PCIe switches hinder their widespread adoption beyond specialized datacenter use cases.
This paper argues that PCIe device pooling can be effectively implemented in software using CXL memory pools. CXL memory pools improve memory utilization and already have positive return on investment. We find that, once CXL pools are in place, they can serve as a building block for pooling any kind of PCIe device. We demonstrate that PCIe devices can directly use CXL memory as I/O buffers without device modifications, which enables routing PCIe traffic through CXL pool memory. This software-based approach is deployable on today's hardware and is more flexible than hardware PCIe switches. In particular, we explore how disaggregating devices such as NICs can transform datacenter infrastructure. | en_US |
| dc.publisher | ACM|Workshop on Hot Topics in Operating Systems | en_US |
| dc.relation.isversionof | https://doi.org/10.1145/3713082.3730393 | en_US |
| dc.rights | Creative Commons Attribution | en_US |
| dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | en_US |
| dc.source | Association for Computing Machinery | en_US |
| dc.title | My CXL Pool Obviates Your PCIe Switch | en_US |
| dc.type | Article | en_US |
| dc.identifier.citation | Yuhong Zhong, Daniel S. Berger, Pantea Zardoshti, Enrique Saurez, Jacob Nelson, Antonis Psistakis, Joshua Fried, and Asaf Cidon. 2025. My CXL Pool Obviates Your PCIe Switch. In Proceedings of the 2025 Workshop on Hot Topics in Operating Systems (HotOS '25). Association for Computing Machinery, New York, NY, USA, 58–66. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory | en_US |
| dc.identifier.mitlicense | PUBLISHER_POLICY | |
| dc.eprint.version | Final published version | en_US |
| dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
| eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
| dc.date.updated | 2025-08-01T08:32:42Z | |
| dc.language.rfc3066 | en | |
| dc.rights.holder | The author(s) | |
| dspace.date.submission | 2025-08-01T08:32:42Z | |
| mit.license | PUBLISHER_CC | |
| mit.metadata.status | Authority Work and Publication Information Needed | en_US |